Ercan, R., Xia, Y., Zhao, Y. et al. (3 more authors) (2024) A Real-Time Machine Learning Module for Motion Artifact Detection in fNIRS. In: 2024 IEEE International Symposium on Circuits and Systems (ISCAS). 2024 IEEE International Symposium on Circuits and Systems (ISCAS), 19-22 May 2024, Singapore. IEEE International Symposium on Circuits and Systems (ISCAS) . IEEE ISBN 979-8-3503-3100-4
Abstract
Functional Near-Infrared Spectroscopy (fNIRS) is a neuroimaging method which can be implemented with a wearable form factor. However, the data of fNIRS can be affected by motion artifact, which is conventionally processed offline using MATLAB-based software package via a bulky PC. This study trains a Support Vector Machine (SVM) algorithm and proposes a hardware design approach based on an FPGA to achieve the first real-time fNIRS motion artifact detection. The SVM hardware architecture proposed here utilizes a partially sequential-partially parallel implementation of the classification algorithm where Support Vector channels are consolidated into a single oversampled channel. A high classification accuracy of 97.42%, low FPGA resource utilization of 38,354 look-up tables and 6024 flip-flops with 10.92 us latency is achieved, outperforming conventional CPU SVM methods. These results show that an FPGA-based fNIRS motion artifact detector can be exploited whilst meeting real-time and resource constraints that are crucial in high-performance reconfigurable hardware systems.
Metadata
Item Type: | Proceedings Paper |
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Authors/Creators: |
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Copyright, Publisher and Additional Information: | © 2024 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. |
Keywords: | fNIRS, machine learning, motion artifact detection, real-time, support vector machines (SVM), Field-programmable gate array (FPGA) |
Dates: |
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Institution: | The University of Leeds |
Academic Units: | The University of Leeds > Faculty of Engineering & Physical Sciences (Leeds) > School of Mechanical Engineering (Leeds) > Institute of Medical and Biological Engineering (iMBE) (Leeds) |
Depositing User: | Symplectic Publications |
Date Deposited: | 14 Aug 2024 14:19 |
Last Modified: | 16 Aug 2024 14:24 |
Published Version: | https://ieeexplore.ieee.org/document/10557996 |
Status: | Published |
Publisher: | IEEE |
Series Name: | IEEE International Symposium on Circuits and Systems (ISCAS) |
Identification Number: | 10.1109/iscas58744.2024.10557996 |
Open Archives Initiative ID (OAI ID): | oai:eprints.whiterose.ac.uk:216110 |