Khan, Z-U-A. and Benaissa, M. (2015) Throughput/Area-efficient ECC Processor Using Montgomery Point Multiplication on FPGA. IEEE Transactions on Circuits and Systems II: Express Briefs, 62 (11). pp. 1078-1082. ISSN 1549-7747
Abstract
High throughput while maintaining low resource is a key issue for elliptic curve cryptography (ECC) hardware implementations in many applications. In this brief, an ECC processor architecture over Galois fields is presented, which achieves the best reported throughput/area performance on field-programmable gate array (FPGA) to date. A novel segmented pipelining digit serial multiplier is developed to speed up ECC point multiplication. To achieve low latency, a new combined algorithm is developed for point addition and point doubling with careful scheduling. A compact and flexible distributed-RAM-based memory unit design is developed to increase speed while keeping area low. Further optimizations were made via timing constraints and logic level modifications at the implementation level. The proposed architecture is implemented on Virtex4 (V4), Virtex5 (V5), and Virtex7 (V7) FPGA technologies and, respectively, achieved throughout/slice figures of 19.65, 65.30, and 64.48 (106/(Seconds × Slices)).
Metadata
Item Type: | Article |
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Authors/Creators: |
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Copyright, Publisher and Additional Information: | © 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/ republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works. |
Keywords: | Efficiency; elliptic curve cryptography (ECC); field-programmable gate array (FPGA); point multiplication (PM); throughput per area (throughput/area) |
Dates: |
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Institution: | The University of Sheffield |
Academic Units: | The University of Sheffield > Faculty of Engineering (Sheffield) > Department of Electronic and Electrical Engineering (Sheffield) |
Depositing User: | Symplectic Sheffield |
Date Deposited: | 22 Jan 2016 16:05 |
Last Modified: | 08 Mar 2016 14:34 |
Published Version: | http://dx.doi.org/10.1109/TCSII.2015.2455992 |
Status: | Published |
Publisher: | Institute of Electrical and Electronics Engineers |
Refereed: | Yes |
Identification Number: | 10.1109/TCSII.2015.2455992 |
Open Archives Initiative ID (OAI ID): | oai:eprints.whiterose.ac.uk:92952 |