PLL-synchronized PWM rectifier: cascaded in-loop low-pass filtering approaches

Amplitude normalization schemes (ANSs) are essential for making PLL dynamics independent of grid amplitude - a critical feature for the stable control of grid-connected power converters. This article presents a comparative analysis of recently proposed low-pass filter (LPF)-based ANS-PLLs and introduces an improved demodulation-based PLL (dPLL) featuring an LPF in the feedforward path. Through small-signal modeling and the symmetric optimum method, we establish that while these architectures share similar open-loop characteristics, existing PLLs require a significantly higher LPF cut-off frequency to achieve an equivalent phase margin. This necessary compromise inherently degrades frequency tracking and harmonic robustness. The proposed dPLL simplifies implementation with one fewer tuning gain while maintaining real-time compatible computational complexity. Additionally, numerical phase-plane analysis demonstrates the global convergence of the dPLL under a wide initial phase estimation error range (−π,π). Experimental validation on an AC-DC PWM rectifier confirms the superior performance of the proposed method in reducing source current harmonic distortion across diverse operating conditions.