A grid synchronization PLL with accurate extraction technique of positive/negative sequences and DC-offset under frequency drift

Mellouli, M. orcid.org/0009-0000-4665-9343, Hamouda, M. orcid.org/0000-0003-2919-1819, Ahmed, H. orcid.org/0000-0001-8952-4190 et al. (2 more authors) (2024) A grid synchronization PLL with accurate extraction technique of positive/negative sequences and DC-offset under frequency drift. IEEE Transactions on Instrumentation and Measurement, 73. 9002611. pp. 1-11. ISSN 0018-9456

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Item Type: Article
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© 2024 The Authors. Except as otherwise noted, this author-accepted version of a journal article published in IEEE Transactions on Instrumentation and Measurement is made available via the University of Sheffield Research Publications and Copyright Policy under the terms of the Creative Commons Attribution 4.0 International License (CC-BY 4.0), which permits unrestricted use, distribution and reproduction in any medium, provided the original work is properly cited. To view a copy of this licence, visit http://creativecommons.org/licenses/by/4.0/

Keywords: Phase locked loops; Power harmonic filters; Demodulation; Frequency estimation; Heuristic algorithms; Synchronization; Harmonic analysis
Dates:
  • Published: 12 April 2024
  • Published (online): 28 March 2024
  • Accepted: 6 March 2024
  • Submitted: 13 December 2023
Institution: The University of Sheffield
Academic Units: The University of Sheffield > Advanced Manufacturing Institute (Sheffield) > Nuclear Advanced Manufacturing Research Centre
Depositing User: Symplectic Sheffield
Date Deposited: 10 Jul 2024 13:54
Last Modified: 10 Jul 2024 13:54
Status: Published
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Refereed: Yes
Identification Number: 10.1109/tim.2024.3382749
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