Mellouli, M. orcid.org/0009-0000-4665-9343, Hamouda, M. orcid.org/0000-0003-2919-1819
, Ahmed, H. orcid.org/0000-0001-8952-4190
et al. (2 more authors)
(2024)
A grid synchronization PLL with accurate extraction technique of positive/negative sequences and DC-offset under frequency drift.
IEEE Transactions on Instrumentation and Measurement, 73.
9002611.
pp. 1-11.
ISSN 0018-9456
Abstract
This article proposes a delayed signal-based demodulation algorithm that enables a fast and accurate extraction of the positive/negative sequences and DC-offset in the grid voltage under a frequency drift. Moreover, a simplified mathematical formalism is proposed to reduce the computational burden for real-time implementation. The algorithm is incorporated with a third-order quasi-type-1 phase-locked loop (TQT1-PLL) to estimate the grid voltage instantaneous phase-angle and frequency. The performance of the proposed PLL referred to as delayed signal demodulation based TQT1-PLL (DSD-TQT1-PLL) is evaluated under highly disturbed grid voltage conditions including DC-offset, fundamental frequency negative sequence (FFNS), characteristic harmonics, and frequency variation. The obtained simulation and experimental results show that the proposed PLL can precisely estimate the frequency and the instantaneous phase-angle of the fundamental frequency positive sequence (FFPS) without any ripple. The results showed also its superiority over the conventional and adaptive QT1-PLLs, where a better dynamic response is obtained.
Metadata
Item Type: | Article |
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Authors/Creators: |
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Copyright, Publisher and Additional Information: | © 2024 The Authors. Except as otherwise noted, this author-accepted version of a journal article published in IEEE Transactions on Instrumentation and Measurement is made available via the University of Sheffield Research Publications and Copyright Policy under the terms of the Creative Commons Attribution 4.0 International License (CC-BY 4.0), which permits unrestricted use, distribution and reproduction in any medium, provided the original work is properly cited. To view a copy of this licence, visit http://creativecommons.org/licenses/by/4.0/ |
Keywords: | Phase locked loops; Power harmonic filters; Demodulation; Frequency estimation; Heuristic algorithms; Synchronization; Harmonic analysis |
Dates: |
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Institution: | The University of Sheffield |
Academic Units: | The University of Sheffield > Advanced Manufacturing Institute (Sheffield) > Nuclear Advanced Manufacturing Research Centre |
Depositing User: | Symplectic Sheffield |
Date Deposited: | 10 Jul 2024 13:54 |
Last Modified: | 10 Jul 2024 13:54 |
Status: | Published |
Publisher: | Institute of Electrical and Electronics Engineers (IEEE) |
Refereed: | Yes |
Identification Number: | 10.1109/tim.2024.3382749 |
Related URLs: | |
Open Archives Initiative ID (OAI ID): | oai:eprints.whiterose.ac.uk:214680 |