Jiang, S. orcid.org/0000-0002-3687-1882, Lee, K.B. orcid.org/0000-0002-5374-2767, Zaidi, Z.H. et al. (3 more authors) (2019) Field plate designs in all-GaN cascode heterojunction field-effect transistors. IEEE Transactions on Electron Devices, 66 (4). pp. 1688-1693. ISSN 0018-9383
Abstract
Different source field plate (FP) connections are compared for the all-GaN integrated cascode device to address the capacitance matching and turn-off controllability issues reported in the conventional GaN plus Si cascode. The experimental results suggest that the cascode device with an FP connected to the source terminal can significantly suppress the off-state internode voltage, leading to minimized capacitive energy loss and reduced overvoltage stress at the internode. This is attributed to the reduced ratio of the drain-source capacitance of the depletion mode cascode part to the total capacitance at the cascode internode. An additional FP on the E-mode cascode part is proposed to further suppress the off-state internode voltage and benefit the device. Cascode devices with the source FP connecting to the enhancement mode gate have an improved switching controllability via gate resistance during turn-off and hence enhanced dv/dt immunity in the drain loop.
Metadata
Item Type: | Article |
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Authors/Creators: |
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Copyright, Publisher and Additional Information: | © 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/ republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works. Reproduced in accordance with the publisher's self-archiving policy. |
Keywords: | Power electronics; semiconductor devices; semiconductor heterojunctions; semiconductor switches |
Dates: |
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Institution: | The University of Sheffield |
Academic Units: | The University of Sheffield > Faculty of Engineering (Sheffield) > Department of Electronic and Electrical Engineering (Sheffield) |
Depositing User: | Symplectic Sheffield |
Date Deposited: | 28 Feb 2019 16:39 |
Last Modified: | 18 Nov 2021 14:44 |
Status: | Published |
Publisher: | Institute of Electrical and Electronics Engineers |
Refereed: | Yes |
Identification Number: | 10.1109/ted.2019.2897602 |
Open Archives Initiative ID (OAI ID): | oai:eprints.whiterose.ac.uk:143101 |