Modelling framework for parallel SiC power MOSFETs chips in modules developed by planar technology

Kamel, T., Griffo, A. orcid.org/0000-0001-5642-2921 and Wang, J. (2019) Modelling framework for parallel SiC power MOSFETs chips in modules developed by planar technology. In: 2018 IEEE International Conference on Electrical Systems for Aircraft, Railway, Ship Propulsion and Road Vehicles & International Transportation Electrification Conference (ESARS-ITEC). 2018 IEEE International Conference on Electrical Systems for Aircraft, Railway, Ship Propulsion and Road Vehicles & International Transportation Electrification Conference (ESARS-ITEC), 07-09 Nov 2018, Nottingham, United Kingdom. IEEE ISBN 978-1-5386-4192-7

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Item Type: Proceedings Paper
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Keywords: SiC Power MOSFET; Modelling; Parallel Chips per Switch; Planar Technology
Dates:
  • Published: 14 January 2019
  • Published (online): 14 January 2019
  • Accepted: 2018
Institution: The University of Sheffield
Academic Units: The University of Sheffield > Faculty of Engineering (Sheffield) > Department of Electronic and Electrical Engineering (Sheffield)
Funding Information:
Funder
Grant number
EUROPEAN COMMISSION - HORIZON 2020
I2MPECT - 636170
Depositing User: Symplectic Sheffield
Date Deposited: 19 Dec 2018 13:24
Last Modified: 14 Jan 2020 01:38
Status: Published
Publisher: IEEE
Refereed: Yes
Identification Number: 10.1109/ESARS-ITEC.2018.8607625
Open Archives Initiative ID (OAI ID):

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