Davis, Robert Ian orcid.org/0000-0002-5772-0928, Altmeyer, Sebastian, Soares Indrusiak, Leandro orcid.org/0000-0002-9938-2920 et al. (3 more authors) (2018) An extensible framework for multicore response time analysis. Real-Time Systems. pp. 607-661. ISSN 1573-1383
Abstract
In this paper, we introduce a multicore response time analysis (MRTA) framework, which decouples response time analysis from a reliance on context independent WCET values. Instead, the analysis formulates response times directly from the demands placed on different hardware resources. The MRTA framework is extensible to different multicore architectures, with a variety of arbitration policies for the common interconnects, and different types and arrangements of local memory. We instantiate the framework for single level local data and instruction memories (cache or scratchpads), for a variety of memory bus arbitration policies, including: Round-Robin, FIFO, Fixed-Priority, Processor-Priority, and TDMA, and account for DRAM refreshes. The MRTA framework provides a general approach to timing verification for multicore systems that is parametric in the hardware configuration and so can be used at the architectural design stage to compare the guaranteed levels of real-time performance that can be obtained with different hardware configurations. We use the framework in this way to evaluate the performance of multicore systems with a variety of different architectural components and policies. These results are then used to compose a predictable architecture, which is compared against a reference architecture designed for good average-case behaviour. This comparison shows that the predictable architecture has substantially better guaranteed real-time performance, with the precision of the analysis verified using cycle-accurate simulation.
Metadata
Item Type: | Article |
---|---|
Authors/Creators: |
|
Copyright, Publisher and Additional Information: | © The Author(s) 2017 |
Keywords: | real time,SCHEDULABILITY ANALYSIS,multicore,multiprocessor,response time analysis,Multicore scheduling,Verification,Timing analysis |
Dates: |
|
Institution: | The University of York |
Academic Units: | The University of York > Faculty of Sciences (York) > Computer Science (York) |
Funding Information: | Funder Grant number EPSRC EP/P003664/1 EPSRC EP/K011626/1 |
Depositing User: | Pure (York) |
Date Deposited: | 19 Jul 2017 15:15 |
Last Modified: | 06 Feb 2025 00:07 |
Published Version: | https://doi.org/10.1007/s11241-017-9285-4 |
Status: | Published |
Refereed: | Yes |
Identification Number: | 10.1007/s11241-017-9285-4 |
Related URLs: | |
Open Archives Initiative ID (OAI ID): | oai:eprints.whiterose.ac.uk:119255 |