Schulte-Braucks, C, Glass, S, Hofmann, E et al. (7 more authors) (2017) Process Modules for GeSn Nanoelectronics with high Sn-contents. Solid-State Electronics, 128. pp. 54-59. ISSN 0038-1101
Abstract
This paper systematically studies GeSn n-FETs, from individual process modules to a complete device. High-k gate stacks and NiGeSn metallic contacts for source and drain are characterized in independent experiments. To study both direct and indirect bandgap semiconductors, a range of 0 at.% to 14.5 at.% Sn-content GeSn alloys are investigated. Special emphasis is placed on capacitance-voltage (C-V) characteristics and Schottky-barrier optimization. GeSn n-FET devices are presented including temperature dependent I-V characteristics. Finally, as an important step towards implementing GeSn in tunnel-FETs, negative differential resistance in Ge0.87Sn0.13 tunnel-diodes is demonstrated at cryogenic temperatures. The present work provides a base for further optimization of GeSn FETs and novel tunnel FET devices.
Metadata
Item Type: | Article |
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Authors/Creators: |
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Copyright, Publisher and Additional Information: | © 2016 Elsevier Ltd. This is an author produced version of a paper published in Solid-State Electronics. Uploaded in accordance with the publisher's self-archiving policy. |
Keywords: | GeSn; MOSFET; high-k/metal gate; NiGeSn |
Dates: |
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Institution: | The University of Leeds |
Academic Units: | The University of Leeds > Faculty of Engineering & Physical Sciences (Leeds) > School of Electronic & Electrical Engineering (Leeds) > Pollard Institute (Leeds) |
Depositing User: | Symplectic Publications |
Date Deposited: | 21 Oct 2016 08:39 |
Last Modified: | 19 Oct 2017 09:52 |
Published Version: | https://doi.org/10.1016/j.sse.2016.10.024 |
Status: | Published |
Publisher: | Elsevier |
Identification Number: | 10.1016/j.sse.2016.10.024 |
Open Archives Initiative ID (OAI ID): | oai:eprints.whiterose.ac.uk:106289 |