Capacitance modelling of a transistor for RF Power Amplifiers in 5G applications

High efficiency modes such as continuum modes rely on the harmonic manipulation of the waveforms in power amplifiers to improve efficiency, output power and robustness against impedance mismatch. Their design benefits from accurate modelling of capacitances in the knee region of the transistor, which may not be easy to extract from measurement due to noise and uncertainty. A table-based model typically has to rely on interpolation and extrapolation for such bias points to ensure a continuous and differentiable behaviour. In this work, we propose a polynomial-based model which satisfies charge conservation at the gate terminal. This model can be used directly for Volterra based analysis to quantify the distortion from capacitors and to find cancellation mechanisms for the feedback capacitance, which is a problem especially for CMOS based amplifiers in 5G applications.