Miyazawa, Alvaro orcid.org/0000-0003-2233-9091 and Cavalcanti, Ana orcid.org/0000-0002-0831-1976 (2011) Refinement-based verification of sequential implementations of Stateflow charts. Electronic Proceedings in Theoretical Computer Science. pp. 65-83. ISSN 2075-2180
Abstract
Simulink/Stateflow charts are widely used in industry for the specification of control systems, which are often safety-critical. This suggests a need for a formal treatment of such models. In previous work, we have proposed a technique for automatic generation of formal models of Stateflow blocks to support refinement-based reasoning. In this article, we present a refinement strategy that supports the verification of automatically generated sequential C implementations of Stateflow charts. In particular, we discuss how this strategy can be specialised to take advantage of architectural features in order to allow a higher level of automation.
Metadata
Item Type: | Article |
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Authors/Creators: |
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Copyright, Publisher and Additional Information: | In Proceedings Refine 2011, arXiv:1106.3488 |
Keywords: | cs.LO |
Dates: |
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Institution: | The University of York |
Academic Units: | The University of York > Faculty of Sciences (York) > Computer Science (York) |
Funding Information: | Funder Grant number EPSRC EP/E025366/1 |
Depositing User: | Pure (York) |
Date Deposited: | 14 Jan 2016 11:30 |
Last Modified: | 23 Jan 2025 00:04 |
Published Version: | https://doi.org/10.4204/EPTCS.55.5 |
Status: | Published |
Refereed: | Yes |
Identification Number: | 10.4204/EPTCS.55.5 |
Related URLs: | |
Open Archives Initiative ID (OAI ID): | oai:eprints.whiterose.ac.uk:93676 |