A Quadrature Sampling RF Travelling Wave ADC architecture for QAM digitisation at mmWave

We introduce a new concept in analogue to digital conversion: the Quadrature Sampling RF Travelling Wave ADC (QSTW-ADC). This samples an RF signal in quadrature at a mmWave carrier (or a high IF). The concept shares aspects of conventional data conversion (flash and pipeline) but now using RF circuit techniques to realise detection circuits that may work at much higher frequencies and are suitable for integration on MMIC processes. The proposed architecture is scalable, by cascading modules, to achieve a desired SNDR or dynamic range for a scenario. The architecture could be split between technologies, to make best use of materials (e.g. RF on GaAs and digital on CMOS). Simulations of a 28 GHz trial GaAs MMIC show an analogue front-end bandwidth of 750 MHz for the ADC. QSTW-ADC numerical models predict an RMS EVM of 5.9 % for 64QAM. The ADC has a simulated ENOB of 4.2 bits for I and 4.2 bits for Q. Suitability for multicarrier modulation is also considered. Initial lab test results from a PCB emulator confirm key system concepts.