Lin, N., Wang, S., Zhang, X. et al. (14 more authors) (2025) LSMR: Synergy Randomness in Liquid State Machine and RRAM-Based Analog-Digital Accelerator. In: ICCAD '24: Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design. ICCAD '24: 43rd IEEE/ACM International Conference on Computer-Aided Design, 27-31 Oct 2024, New York, NY, USA. Association for Computing Machinery, New York, NY, United States. ISBN: 979-8-4007-1077-3.
Abstract
Bio-inspired event sensors are gaining popularity at the edge, such as in robots and wearable electronics. This trend necessitates learning vast amounts of sensory data on the edge, often in few-shot or even zero-shot scenarios, posing challenges in both software and hardware. This paper presents a novel software-hardware co-design to address these issues. Software-wise, we develop an SNN-ANN model, where the SNN encoder is a liquid state machine (LSM) that naturally processes events and significantly reduces learning complexity at the edge due to fixed random weights. The lightweight trainable ANN projection heads are optimized through contrastive learning, enabling zero-shot learning of multimodal events. Hardware-wise, we propose a hybrid analog (RRAM)-digital (CMOS) accelerator - LSMR. The analog in-memory computing core physically implements the LSM by leveraging RRAM stochasticity to generate fixed random weights. The digital core utilizes innovative reconfigurable systolic arrays to accelerate the contrastive learning of ANN projection heads. Extensive experimental outcomes from six neuromorphic datasets, encompassing visual, tactile, and auditory modalities, demonstrate that LSMR considerably improves energy efficiency by a range of 1.65× to 23.70×, in comparison to state-of-the-art edge devices. Simultaneously, it reduces training complexity by a range of 152.83× to 20,587.77× across various edge learning tasks.
Metadata
| Item Type: | Proceedings Paper |
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| Authors/Creators: |
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| Keywords: | Spiking neural networks; Liquid state machine; In-memory computing; Reconfigurable architecture |
| Dates: |
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| Institution: | The University of Leeds |
| Academic Units: | The University of Leeds > Faculty of Engineering & Physical Sciences (Leeds) > School of Computing (Leeds) |
| Date Deposited: | 10 Mar 2026 13:23 |
| Last Modified: | 10 Mar 2026 13:25 |
| Published Version: | https://dl.acm.org/doi/10.1145/3676536.3676691 |
| Status: | Published |
| Publisher: | Association for Computing Machinery |
| Identification Number: | 10.1145/3676536.3676691 |
| Related URLs: | |
| Sustainable Development Goals: | |
| Open Archives Initiative ID (OAI ID): | oai:eprints.whiterose.ac.uk:236079 |


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