Tan, Q.Y. orcid.org/0000-0002-9272-983X and Narayanan, E.M.S. orcid.org/0000-0001-6832-1300 (2021) Evaluation of gate drive circuit effect in cascode GaN-based application. Bulletin of the Polish Academy of Sciences : Technical Sciences, 69 (2). e136742. ISSN 0239-7528
Abstract
This work evaluates the influence of gate drive circuitry to cascode GaN device’s switching waveforms. This is done by comparing three PCBs using three double-pulse-test (DPT) with different gate driving loop design. Among important parasitic elements, source-side inductance shows a significant impact to gate-source voltage waveform. A simulation model based on experimental measurement of the cascode GaNFET used in this work is modified by author. The simulation model is implemented in a synchronous buck converter topology and hereby to assess the impact of gate driving loop of cascode GaN device in both continuous conduction mode (CCM) and critical conduction mode (CRM). Apart from simulation, a synchronous buck converter prototype is presented for experimental evaluation, which shows a 99.15% efficiency at 5A under soft-switching operation (CRM) with a 59ns dead-time.
Metadata
Item Type: | Article |
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Authors/Creators: |
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Copyright, Publisher and Additional Information: | © 2021 The Author(s). This is an open access article under the CC BY license (http://creativecommons.org/licenses/by/4.0/). |
Keywords: | cascode GaNFETs; parasitics; buck-converter; gate drive design |
Dates: |
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Institution: | The University of Sheffield |
Academic Units: | The University of Sheffield > Faculty of Engineering (Sheffield) > Department of Electronic and Electrical Engineering (Sheffield) |
Depositing User: | Symplectic Sheffield |
Date Deposited: | 08 Apr 2021 07:16 |
Last Modified: | 10 Feb 2022 14:36 |
Status: | Published |
Publisher: | Polish Academy of Sciences |
Refereed: | Yes |
Identification Number: | 10.24425/bpasts.2021.136742 |
Open Archives Initiative ID (OAI ID): | oai:eprints.whiterose.ac.uk:172265 |
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