Burmester Campos, Pedro orcid.org/0000-0001-6933-3282, Dahir, Nizar, Bonney, Colin Andrew et al. (3 more authors) (2017) XL-STaGe:A Cross-Layer Scalable Tool for Graph Generation, Evaluation and Implementation. In: International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XVI), 17-20 Jul 2016.
Abstract
This paper presents XL-STaGe, a cross-layer tool for traffic-inclusive directed acyclic graph generation and implementation. In contrast to other graph-generation tools which focus on high-level DAG models, XL-STaGe consists of a set of processes that generate the task-graphs as well as a detailed process model for each node in each graph. The tool is highly customizable, with many parameters that can be tuned to meet the user’s requirements to control the topology, connection density, degree of parallelism and duration the task-graph. Moreover, two use cases are presented, a high-level one, which illustrate the benefit of the developed tool in application mapping and a circuit-level one to verify the accuracy of the XL-STaGe process models when implemented in hardware.
Metadata
Item Type: | Conference or Workshop Item |
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Authors/Creators: |
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Keywords: | network traffic,graceful,Many-Core,traffic modelling,optimisation |
Dates: |
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Institution: | The University of York |
Academic Units: | The University of York > Faculty of Sciences (York) > Electronic Engineering (York) |
Funding Information: | Funder Grant number EPSRC EP/L000563/1 |
Depositing User: | Pure (York) |
Date Deposited: | 09 Sep 2016 09:55 |
Last Modified: | 27 Nov 2024 00:50 |
Published Version: | https://doi.org/10.1109/SAMOS.2016.7818372 |
Status: | Published |
Refereed: | Yes |
Identification Number: | 10.1109/SAMOS.2016.7818372 |
Open Archives Initiative ID (OAI ID): | oai:eprints.whiterose.ac.uk:104509 |
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Filename: samos16.pdf
Description: XL-STaGe: A Cross-Layer Scalable Tool for Graph Generation, Evaluation and Implementation