Johnson, Anju P. orcid.org/0000-0002-7017-1644, Chakraborty, Rajat Subhra and Mukhopadhyay, Debdeep (2016) An Improved DCM-based Tunable True Random Number Generator for Xilinx FPGA. IEEE Transactions on Circuits and Systems II: Express Briefs. pp. 452-456. ISSN 1549-7747
Abstract
True Random Number Generators (TRNGs) play a very important role in modern cryptographic systems. Field Programmable Gate Arrays (FPGAs) form an ideal platform for hardware implementations of many of these security algorithms. In this paper we present a highly efficient and tunable TRNG based on the principle of Beat Frequency Detection (BFD), specifically for Xilinx FPGA based applications. The main advantages of the proposed TRNG are its on-the-fly tunability through Dynamic Partial Reconfiguration (DPR) to improve randomness qualities. We describe the mathematical model of the TRNG operations, and experimental results for the circuit implemented on a Xilinx Virtex-V FPGA. The proposed TRNG has low hardware footprint and in-built bias elimination capabilities. The random bitstreams generated from it passes all tests in the NIST statistical testsuite.
Metadata
Item Type: | Article |
---|---|
Authors/Creators: |
|
Copyright, Publisher and Additional Information: | (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. This is an author-produced version of the published paper. Uploaded in accordance with the publisher’s self-archiving policy. Further copying may not be permitted; contact the publisher for details |
Keywords: | Digital Clock Manager,Dynamic Partial Reconfiguration,field programmable gate arrays (FPGAs),True Random Number Generators |
Dates: |
|
Institution: | The University of York |
Academic Units: | The University of York > Faculty of Sciences (York) > Electronic Engineering (York) |
Depositing User: | Pure (York) |
Date Deposited: | 12 Aug 2016 11:34 |
Last Modified: | 21 Jan 2025 17:22 |
Published Version: | https://doi.org/10.1109/TCSII.2016.2566262 |
Status: | Published |
Refereed: | Yes |
Identification Number: | 10.1109/TCSII.2016.2566262 |
Open Archives Initiative ID (OAI ID): | oai:eprints.whiterose.ac.uk:103707 |
Download
Filename: Camera_ready.pdf
Description: An Improved DCM-based Tunable True Random Number Generator for Xilinx FPGA