Jiang, S., Lee, K.B., Guiney, I. et al. (7 more authors) (2017) All-GaN Integrated Cascode Heterojunction Field Effect Transistors. IEEE Transactions on Power Electronics. ISSN 0885-8993
Abstract
All-GaN integrated cascode heterojunction field effect transistors were designed and fabricated for power switching applications. A threshold voltage of +2 V was achieved using a fluorine treatment and a metal-insulator-semiconductor gate structure on the enhancement mode part. The cascode device exhibited an output current of 300 mA/mm by matching the current drivability of both enhancement and depletion mode parts. The optimisation was achieved by shifting the threshold voltage of the depletion mode section to a more negative value with the addition of a dielectric layer under the gate. The switching performance of the cascode was compared to the equivalent GaN enhancement-mode-only device by measuring the hard switching speed at 200 V under an inductive load in a double pulse tester. For the first time, we demonstrate the switching speed advantage of the cascode over equivalent GaN enhancement-mode-only devices, due to the reduced Miller-effect and the unique switching mechanisms. These observations suggest that practical power switches at high power and high switching frequency will benefit as part of an integrated cascode configuration.
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Copyright, Publisher and Additional Information: | © Institute of Electrical and Electronics Engineers. This work is licensed under a Creative Commons Attribution 3.0 License. For more information, see http://creativecommons.org/licenses/by/3.0/. | ||||
Keywords: | Semiconductor heterojunctions; Power electronics; Semiconductor devices; Semiconductor switches; SPICE | ||||
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Institution: | The University of Sheffield | ||||
Academic Units: | The University of Sheffield > Faculty of Engineering (Sheffield) > Department of Electronic and Electrical Engineering (Sheffield) | ||||
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Depositing User: | Symplectic Sheffield | ||||
Date Deposited: | 22 Feb 2017 10:52 | ||||
Last Modified: | 12 Apr 2017 09:46 | ||||
Published Version: | https://doi.org/10.1109/TPEL.2016.2643499 | ||||
Status: | Published online | ||||
Publisher: | Institute of Electrical and Electronics Engineers | ||||
Refereed: | Yes | ||||
Identification Number: | 10.1109/TPEL.2016.2643499 |
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