Analysis of gain variation with changing supply voltages in GaN HEMTs for envelope tracking power amplifiers

Envelope tracking (ET) is a promising power amplifier (PA) architecture for current and future communications systems, which uses dynamic modulation of the supply voltage to provide high efficiency and potentially very wide bandwidth over a large dynamic range of output power. However, the dynamic nature of the supply voltage can lead to a problematic variation in transistor gain, particularly in GaN HEMTs. This paper describes and analyzes this behavior and the detrimental effect it can have on ET PAs. Contributing factors and origins of gain variation are described in detail along with how, for the first time, meaningful comparisons can be made between different devices. Using these guidelines, gain variation is shown to be a widespread issue effecting most GaN HEMTs presented in literature. To allow an analysis of the intrinsic device behavior, an extended transistor model is developed that takes the effect of gate and source field plates into account. This model is refined using measurement data and used to demonstrate the fact that the parasitic gate–drain capacitance ( $C_{\textrm {GD}}$ ) is the main contributor to the small-signal gain variation—a significant part of the overall gain variation. Based on this knowledge, possible strategies to reduce gain variation at the transistor technology level are proposed, allowing the optimization of GaN HEMTs specifically for ET PAs. One identified strategy involves reducing the length of the gate field plate and is shown to be a viable approach to reduce the gain variation in GaN HEMTs, albeit at an increased RF/dc dispersion.