Modelling, Analysis and Experimental Validation of Clock Drift Effects in Low-Inertia Power Systems

Clock drift in digital controllers is of great relevance in many applications. Since almost all real clocks exhibit drifts, this applies in particular to networks composed of several individual units, each of which being operated with its individual clock. In the present paper, we demonstrate via extensive experiments on a microgrid in the megawatt range that clock drifts may impair frequency synchronization in low-inertia power systems. The experiments also show that-in the absence of a common clock-the standard model of an inverter as an ideal voltage source does not capture this phenomenon. As a consequence, we derive a suitably modified model of an inverter-interfaced unit that incorporates the phenomenon of clock drifts. By using the derived model, we investigate the effects of clock drifts on the performance of droop-controlled grid-forming inverters with regard to frequency synchronization and active power sharing. The modeling and analysis is validated via extensive experiments on a microgrid in the megawatt range.