End-to-End Schedulability Tests for Multiprocessor Embedded Systems based on Networks-on-Chip with Priority-Preemptive Arbitration

Soares Indrusiak, Leandro orcid.org/0000-0002-9938-2920 (2014) End-to-End Schedulability Tests for Multiprocessor Embedded Systems based on Networks-on-Chip with Priority-Preemptive Arbitration. Journal of systems architecture. pp. 553-561. ISSN 1383-7621

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Copyright, Publisher and Additional Information: © 2014 Elsevier. This is an author-produced version of the published paper. Uploaded in accordance with the publisher’s self-archiving policy. Further copying may not be permitted; contact the publisher for details
Keywords: Network-on-chip,Embedded systems,Hard real-time,Software,Hardware and Architecture
Dates:
  • Published: August 2014
  • Published (online): 13 June 2014
Institution: The University of York
Academic Units: The University of York > Faculty of Sciences (York) > Computer Science (York)
Depositing User: Pure (York)
Date Deposited: 03 Feb 2016 16:59
Last Modified: 11 Jul 2021 10:20
Published Version: https://doi.org/10.1016/j.sysarc.2014.05.002
Status: Published
Refereed: Yes
Identification Number: https://doi.org/10.1016/j.sysarc.2014.05.002

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