wrBench: Comparing Cache Architectures and Coherency Protocols on ARMv8 Many-Core Systems

Gao, W-R, Fang, J-B, Huang, C et al. (2 more authors) (2023) wrBench: Comparing Cache Architectures and Coherency Protocols on ARMv8 Many-Core Systems. Journal of Computer Science and Technology, 38 (6). pp. 1323-1338. ISSN 1000-9000

Abstract

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Authors/Creators:
Copyright, Publisher and Additional Information: © Institute of Computing Technology, Chinese Academy of Sciences 2023. This version of the article has been accepted for publication, after peer review (when applicable) and is subject to Springer Nature’s AM terms of use (https://www.springernature.com/gp/open-research/policies/accepted-manuscript-terms), but is not the Version of Record and does not reflect post-acceptance improvements, or any corrections. The Version of Record is available online at: http://dx.doi.org/10.1007/s11390-021-1251-x.
Keywords: ARMv8 many-core; cache architecture; microbenchmark; core-to-core communication
Dates:
  • Accepted: 14 November 2021
  • Published (online): 30 November 2023
  • Published: 2 December 2023
Institution: The University of Leeds
Academic Units: The University of Leeds > Faculty of Engineering & Physical Sciences (Leeds) > School of Computing (Leeds)
Depositing User: Symplectic Publications
Date Deposited: 22 Sep 2021 12:52
Last Modified: 06 Feb 2024 16:49
Status: Published
Publisher: Springer
Identification Number: https://doi.org/10.1007/s11390-021-1251-x

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